1. Field of the Invention
The present invention relates to a method of manufacturing a thin film transistor array substrate and a display device.
2. Description of Related Art
Thin film transistors (hereinafter, also referred to as “TFTs”) are widely used as transistors for driving pixels of an active-matrix liquid-crystal display (AMLCD). Among the TFTs, TFTs having an amorphous silicon (Si) film used as a semiconductor film are produced with high productivity and widely applied to various fields, since the TFTs can be manufactured with a small number of manufacturing steps and the size of an insulating substrate for the TFTs can be easily increased.
A manufacturing process for a TFT array substrate requires at least five different etching processes. Further, in order to form a resist pattern corresponding to each of the etching processes, five photolithography processes are required. To carry out the five photolithography processes, five photomasks are used (see, for example, Japanese Unexamined Patent Application Publication No. 11-64884).
In recent years, a method of further reducing the number of manufacturing steps in order to reduce manufacturing costs has been proposed. The number of manufacturing steps is reduced by using, for example, so-called multi-gradation exposure and lift-off techniques. According to the multi-gradation exposure technique, a resist film thickness can be intentionally varied. In order to vary the resist film thickness, it is necessary to form a halftone area that allows an amount of light smaller than that of light passing through a transparent substrate, on a photomask. As a method of forming the halftone area, a method using a gray tone mask and a method using a halftone mask are known. The gray tone mask is used to control the amount of transmitted light in a portion in which micropatterns that are unresolved during a photolithography process are arranged in a slit shape or a matrix shape. The halftone mask is used to form the halftone area using a translucent film.
Japanese Unexamined Patent Application Publication No. 2002-26333 (Hayase et al.) discloses a method of manufacturing an inversely-staggered liquid crystal display device including an electrostatic protection circuit section by using a four-mask technique. Japanese Unexamined Patent Application Publication No. 2004-318076 (Lee et al.) discloses a method of manufacturing a lateral electric field driven liquid crystal display. Further, Japanese Unexamined Patent Application Publication No. 2002-26011 (Kido et al.) discloses a method of manufacturing a liquid crystal display device including an inversely-staggered TFT enabling a reduction in the number of manufacturing processes, by using the lift-off technique in combination with the multi-gradation exposure technique.
Hayase et al. discloses a structure in which a transparent conductive film (transparent electrode layer) is formed on source/drain electrodes without an interlayer insulating film interposed therebetween so as to electrically connect the source/drain electrodes and a gate electrode through the transparent conductive film. In this case, ITO, ITZO, IZO, or the like, which is generally used for the transparent conductive film, has a volume resistivity that is about two orders of magnitude greater than that of a metallic material generally used for the gate electrode and source/drain electrodes. For this reason, when the source/drain electrodes and the gate electrode are electrically connected to each other through the transparent conductive film, it is necessary to adequately secure an area in contact with the transparent conductive film in order to suppress an increase in resistance.
The liquid crystal display device disclosed in Lee et al. has a structure in which a transparent conductive film such as ITO is not used, which leads to a cost reduction. In the liquid crystal display device, however, metal is exposed through an opening serving as a terminal section to receive an external signal and the like, which causes a problem in that the metal of the terminal section is more likely to corrode in the external atmosphere. Further, in the device disclosed in Lee et al., a contact hole is formed in stacked films of a gate insulating film and a semiconductor film. Thus, surface unevenness occurs at a part of the contact hole, which deteriorates the coverage of the conductive film formed on an upper layer and in the contact hole, at a contact hole portion. This may lead to a malfunction such as disconnection.
Kido et al. discloses a structure in which a Cr conductive film forming a gate electrode, and a metal conductive film forming source/drain electrodes are electrically connected to each other through a transparent conductive film. Thus, as in Hayase et al., it is necessary to adequately secure an area in contact with the transparent conductive film in order to suppress an increase in resistance.
In recent years, there is an increasing demand for reducing the whole size of display devices while securing a display area. Accordingly, there is a need for a structure in which a frame area located outside the display area is reduced. Furthermore, there is a need for a display device with high reliability.